The trend in the semiconductor industry today is the production of ever increasingly more capable semiconductor components, while decreasing component size and total semiconductor package height. Stacked die configuration is a popular method to realize increased semiconductor device density. With the need to achieve ever smaller package sizes and thinner package heights being an ongoing driver, new die stacking methodologies are sought.
FIG. 1 is a cross-sectional view of a plurality of stacked dies. As illustrated in FIG. 1, a plurality of integrated circuit (IC) chips (i.e., dies) 120 are arranged in a stacked die configuration upon a substrate 110. In this embodiment, the stacked die configuration comprises four dies 120. However, other quantities of dies may be used. Interposed between the dies 120 are die spacers 124. A die spacer 124 provides a necessary space between two dies 120 to prevent the above die 120 from touching, shorting, or damaging bonding wires 130 below. In one embodiment, the die spacers 124 are silicon spacers. The dies 120 and die spacers 124 are attached to each other with adhesive layers 122. The bottom die 120 is attached to the substrate 120 with an adhesive layer 122. The bottom surface of each die 120 or spacer 124 may be laminated with an adhesive film during the manufacturing process, commonly at the wafer level. In other embodiments, the adhesive layer 122 can be an epoxy or liquid paste that is applied at the time of attachment. The adhesive layer 122 is then cured (e.g. baked) to complete the die attachment.
FIG. 2 illustrates a portion D of FIG. 1 shown in a top-down view. Each die 120 is electrically connected to the substrate 110 (e.g. a printed circuit board or other electronic system) by wires formed during a wire bonding process. As illustrated in FIGS. 1 and 2, the wire bonding process attaches connecting bond wires 130 between bonding pads 132 (not shown) on each die 120 to contact points 134 on bond fingers 136 on the substrate 110. The portion D of FIG. 1 illustrated in a top-down view in FIG. 2 comprises a bond finger 136 with a plurality of contact points 134 and attached bond wires 130. The wire bonding process begins by forming a first bond on the die. This first bond is forming by melting the end of a bond wire 130 to form a molten ball 138 on the bonding pad 132. After attaching the bond wire 130 to the die and providing a sufficient amount of slack in the bond wire 130, the wire bonding process finishes by pressing the bond wire 130 onto the contact point 134 to form a fish-tail shaped stitch bond 140. As illustrated in FIG. 2, with a plurality of stacked dies, a plurality of in-line contact points 134 are required for the plurality of stitch bonds 140 applied to each bond finger 136. As further illustrated in FIG. 3, there can also be a plurality of bonding pads 132 on each die 120 with a corresponding plurality of bond fingers 136.
During the wire bonding process, a wire bond machine welds the bond wires 130 between the bonding pads 132 and the contact points 134 utilizing ultrasonic, thermosonic or thermocompression bonding. As illustrated in FIGS. 1, 2, and 3, each die 120 has at least one plurality of bond wires 130 extending from bonding pads 132 to contact points 134. Each bond wire 130 has its own corresponding bonding pad 132 and contact point 134. However, as illustrated in FIG. 2, as die stacking increases (e.g., four dies), bond finger length must also increase to accommodate the additional bond wires connecting to the same bond finger 136 at additional contact points 134. The total bond finger length requirement is exacerbated by the need to provide a minimum space between contact points 134 to prevent damage to the already emplaced bond wires 130 during the wire bonding process. For example, while an exemplary single contact bond finger length can be 0.20 mm, an exemplary quadruple bond (in-line), as illustrated in FIG. 2, requires 0.56 mm. Thus, even as increasing levels of die stacking increases the density of the semiconductor device, the resulting increasing bond finger length requires an increase in semiconductor device package size.